ChipEnet.com - Ethernet Attached FPGA Acceleration
Gigabit, 100Mb Ethernet MAC IP cores for Xilinx FPGAs
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ChipEnet Ethernet MAC IP cores enables easy control and interface of FPGA
based accelerators. FPGAs offer quick implementation and high video data
dynamics simulation. While current CPUs do run at multi-GHz rates, even
compression/decompresion, data encryption/decryption, or molecular
compression/decompresion, data encryption/decryption, or molecular
dynamics simulation. While current CPUs do run at multi-GHz rates, even
the newest CPUs can only handle a small number of threads of execution in
parallel. In contrast, a FPGA can handle hundreds or thousands of threads
in parallel, albeit at a lower clock rate. Without the implementation ( and
easy incremental improvement ) of special algorithms that cannot be or are
difficult to execute with standard desktops or servers.
But being able to execute the special algorithms quickly is not enough.
Where does the data come form and where does the processed data go ?
How is the FPGA accelerator controlled and initialized ? These types of IO
and management functions are best handled by standard desktops or
servers. A desktop or server running Unix, Linux, Windows, or Mac OS
offers a far more powerful management environment than an embedded
processor running a small embedded OS can ever achieve.
The next question is then, How do you connect a FPGA accelerator to a
standard desktop or server ? This is where Ethernet comes in. Using
Ethernet MAC IP cores to interface to FPGA accelerators offers many
advantages. Simple programming, no drivers necessary, and the option to
share the FPGA accelerator with other desktop or server on the network
are key advantages. Read more here. The other option of using PCI or PCI
Express bus to connect to a desktop or server requires far more effort,
driver needed for every OS and continuous updates for every OS changes,
and more implementation constraints due to PCI board size and power
limitations.
based accelerators. FPGAs offer quick implementation and high video data
dynamics simulation. While current CPUs do run at multi-GHz rates, even
compression/decompresion, data encryption/decryption, or molecular
compression/decompresion, data encryption/decryption, or molecular
dynamics simulation. While current CPUs do run at multi-GHz rates, even
the newest CPUs can only handle a small number of threads of execution in
parallel. In contrast, a FPGA can handle hundreds or thousands of threads
in parallel, albeit at a lower clock rate. Without the implementation ( and
easy incremental improvement ) of special algorithms that cannot be or are
difficult to execute with standard desktops or servers.
But being able to execute the special algorithms quickly is not enough.
Where does the data come form and where does the processed data go ?
How is the FPGA accelerator controlled and initialized ? These types of IO
and management functions are best handled by standard desktops or
servers. A desktop or server running Unix, Linux, Windows, or Mac OS
offers a far more powerful management environment than an embedded
processor running a small embedded OS can ever achieve.
The next question is then, How do you connect a FPGA accelerator to a
standard desktop or server ? This is where Ethernet comes in. Using
Ethernet MAC IP cores to interface to FPGA accelerators offers many
advantages. Simple programming, no drivers necessary, and the option to
share the FPGA accelerator with other desktop or server on the network
are key advantages. Read more here. The other option of using PCI or PCI
Express bus to connect to a desktop or server requires far more effort,
driver needed for every OS and continuous updates for every OS changes,
and more implementation constraints due to PCI board size and power
limitations.
Need more bandwidth ? Take a look at the 4 Gigabit ChipEnet Virtual
Ethernet MAC core. read more
Ethernet MAC core. read more
Check out the Linux packet processing max limits experiment using the
ChipEnet SM1000 Ethernet MAC core. read more
ChipEnet SM1000 Ethernet MAC core. read more